The reason why I add openCL is.
If I want to compute something on FPGA.
I can use Verilog , VHDL , SystemVerilog , Scala to describe my computation unit.
But not just that.
I need memory to store the variable,
I also need way to move the data from PC to FPGA.
And also move dat from FPGA to PC.
I can use network,part,usb or pcie.
These communication logic elements are more complex then the original computation.
OpenCL save me from that. (But also come with cost, ...)